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HARDWARE TRUST ANCHORS IN SP-ENABLED PROCESSORS
Researchers at
The invention consists of a set of hardware registers and mechanisms that define a small set of fundamental “hardware trust anchors”, and cryptographic and tagging mechanisms that can be implemented in any processor or SOC used in computing, communications or entertainment devices. It is made by building the SP hardware features into any processor chip or SOC (system on chip) or FPGA attachment. These new SP hardware features can be used to protect trusted software, which is bound to the device. The trusted software can use the hardware trust anchors as root secrets to protect other secret or sensitive information for many different usage scenarios. For example, it can provide transient trust for sensitive information needed by first responders for emergency response, which can be reliably revoked at the end of the emergency. It also provides hardware-enforced policy-controlled secrets belonging to different organizations, and remote attestation and secure communications with a trusted entity.
The device is much simpler than industry’s currently used Trusted Platform Module (TPM) as it does not require costly public-key cryptography, a separate chip and external trusted databases for checking integrity measurements of code. Additionally, it does not require the commodity operating system to be trusted.
It is anticipated that this new device can be implemented in microprocessors, embedded processors, application-specific processors, security processors, cryptoprocessors, communications processors, coprocessors and SOCs (System on Chip’s) to simplify architecture and improve security.
Patent protection is pending.
For more information please contact:
William H. Gowen
Office of Technology Licensing and Intellectual Property
4 New South Building
(609) 258-6762
(609) 258-1159 fax