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In digital circuits, an adder-subtractor is a circuit that is capable of adding or subtracting numbers (in particular, binary). Below is a circuit that does adding or subtracting depending on a control signal. However, it is possible to construct a circuit that performs both addition and subtraction at the same time.

### Construction

Having an n-bit adder for A and B, then S = A + B. Then, assume the numbers are in two's complement. Then to perform BA, two's complement theory says to invert each bit with a NOT gate then add one. This yields $S = B + \overline{A} + 1$, which is easy to do with a slightly modified adder.

By preceding each A input bit on the adder with a 2-to-1 multiplexer where:

• Input 0 (I0) is straight through (Ai)
• Input 1 (I1) is negated ($\overline{A_i}$)

that has control input D and the initial carry connect is also connected to D then:

• when D = 1 the modified adder performs subtraction

This works because when D = 1 the A input to the adder is really $\overline{A}$ and the carry in is 1. Adding B to $\overline{A}$ and 1 yields the desired subtraction of BA.

### Role in the arithmetic logic unit

Adders are a part of the core of an arithmetic logic unit (ALU). The control unit decides which operations an ALU should perform (based on the op code being executed) and sets the ALU operation. The D input to the adder-subtractor above would be one such control line from the control unit.

The adder-subtractor above could easily be extended to include more functions. For example, a 2-to-1 multiplexer could be introduced on each Bi that would switch between zero and Bi; this could be used (in conjunction with D = 1) to yield the two's complement of A since $-A = \overline{A} + 1$.

A further step would be to change the 2-to-1 mux on A to a 4-to-1 with the third input being zero, then replicating this on Bi thus yielding the following output functions:

• 0 (with the both Ai and Bi input set to zero and D = 0)
• 1 (with the both Ai and Bi input set to zero and D = 1)
• A (with the Bi input set to zero)
• B (with the Ai input set to zero)
• A + 1 (with the Bi input set to zero and D = 1)
• B + 1 (with the Ai input set to zero and D = 1)
• A + B
• AB
• BA
• $\overline{A}$ (with Ai set to invert; Bi set to zero; and D = 0)
• A (with Ai set to invert; Bi set to zero; and D = 1)
• $\overline{B}$ (with Bi set to invert; Ai set to zero; and D = 0)
• B (with Bi set to invert; Ai set to zero; and D = 1)