In digital circuits, an addersubtractor is a circuit that is capable of adding or subtracting numbers (in particular, binary). Below is a circuit that does adding or subtracting depending on a control signal. However, it is possible to construct a circuit that performs both addition and subtraction at the same time.
Construction
Having an nbit adder for A and B, then S = A + B. Then, assume the numbers are in two's complement. Then to perform B − A, two's complement theory says to invert each bit with a NOT gate then add one. This yields , which is easy to do with a slightly modified adder.
By preceding each A input bit on the adder with a 2to1 multiplexer where:
 Input 0 (I_{0}) is straight through (A_{i})
 Input 1 (I_{1}) is negated ()
that has control input D and the initial carry connect is also connected to D then:
 when D = 0 the modified adder performs addition
 when D = 1 the modified adder performs subtraction
This works because when D = 1 the A input to the adder is really and the carry in is 1. Adding B to and 1 yields the desired subtraction of B − A.
Role in the arithmetic logic unit
Adders are a part of the core of an arithmetic logic unit (ALU). The control unit decides which operations an ALU should perform (based on the op code being executed) and sets the ALU operation. The D input to the addersubtractor above would be one such control line from the control unit.
The addersubtractor above could easily be extended to include more functions. For example, a 2to1 multiplexer could be introduced on each B_{i} that would switch between zero and B_{i}; this could be used (in conjunction with D = 1) to yield the two's complement of A since .
A further step would be to change the 2to1 mux on A to a 4to1 with the third input being zero, then replicating this on B_{i} thus yielding the following output functions:
 0 (with the both A_{i} and B_{i} input set to zero and D = 0)
 1 (with the both A_{i} and B_{i} input set to zero and D = 1)
 A (with the B_{i} input set to zero)
 B (with the A_{i} input set to zero)
 A + 1 (with the B_{i} input set to zero and D = 1)
 B + 1 (with the A_{i} input set to zero and D = 1)
 A + B
 A − B
 B − A
 (with A_{i} set to invert; B_{i} set to zero; and D = 0)
 − A (with A_{i} set to invert; B_{i} set to zero; and D = 1)
 (with B_{i} set to invert; A_{i} set to zero; and D = 0)
 − B (with B_{i} set to invert; A_{i} set to zero; and D = 1)
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