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HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001.[1] The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology.



Multi-link high-speed interconnect

HyperTransport comes in four speed versions—1.x, 2.0, 3.0, and 3.1—which run from 200 MHz to 3.2 GHz. It is also a DDR or "Double Data Rate" connection, meaning it sends data on both the rising and falling edges of the clock signal. This allows for a maximum data rate of 6400 MT/s when running at 3.2 GHz. The operating frequency is auto-negotiated.

HyperTransport supports an auto-negotiated bit width, ranging from two- to 32-link interconnects. The full-width, full bandwidth, 32-bit interconnect has a transfer rate of 25.6 GB/s (3.2 GHz/link × 2 bits/Hz × 32 links × 1 Byte ÷ 8 bits) per direction, or 51.2 GB/s aggregated bandwidth per link, making it faster than any existing bus standard for PC workstations and servers (such as Intel sponsored PCI Express) as well as making it faster than most bus standards for high-performance computing and networking. Links of various widths can be mixed together in a single system (for example, one 16-link interconnect to another CPU and one 8-link interconnect to a peripheral device), which allows for a wider interconnect between CPUs, and a lower bandwidth interconnect to peripherals as appropriate. It also supports link splitting, where a single 16-link interconnect can be divided into two 8-link interconnects. The technology also typically has lower latency than other solutions due to its lower overhead.

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