ASPLOS XII, Oct. 21 through 25, 2006, San Jose, CA
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Twelfth International Conference on
Architectural Support for Programming Languages and Operating Systems

Technical Program

Sunday October 22
7PM-9PM Welcome Reception
Hilton Almaden Ballroom
Sponsored by Microsoft Research

Monday October 23, 2006

8-8:45am Breakfast
8:45-9am Opening remarks
9am-10am Keynote: Prof. Mendel Rosenblum, Stanford University.
"The Impact of Virtualization on Computer Architecture and Operating Systems"

10:30-noon: Session 1: Virtualization. 

A COMPARISON OF SOFTWARE AND HARDWARE TECHNIQUES FOR X86 VIRTUALIZATION. 
Keith Adams and Ole Agesen

GEIGER: MONITORING THE PAGE CACHE IN A VIRTUAL MACHINE ENVIRONMENT.
Stephen Jones, Andrea Arpaci-Dusseau and Remzi Arpaci-Dusseau

TEMPORAL SEARCH: DETECTING HIDDEN MALWARE TIMEBOMBS WITH VIRTUAL MACHINES.
Jedidiah R. Crandall, Gary Wassermann, Daniela A. S. de Oliveira, Zhendong Su, S. Felix Wu and Frederic T. Chong

Noon-1:30: Lunch
Almaden Concourse
Sponsored by Intel

1:30-3:00 Session 2A: Races and Memory Debugging I

AVIO: DETECTING ATOMICITY VIOLATIONS VIA ACCESS INTERLEAVING INVARIANTS.
Shan Lu, Joseph Tucek, Feng Qin and Yuanyuan Zhou

A REGULATED TRANSITIVE REDUCTION FOR LONGER MEMORY RACE RECORDING.
Min Xu, Rastislav Bodik and Mark Hill

BELL: BIT-ENCODING ONLINE MEMORY LEAK DETECTION.
Michael Bond and Kathryn McKinley

1:30-3:00 Session 2B: Hardware Reliability and Fault Tolerance

ULTRA LOW-COST DEFECT PROTECTION FOR MICROPROCESSOR PIPELINES.
Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco and Todd Austin

UNDERSTANDING PREDICTION-BASED PARTIAL REDUNDANT THREADING FOR LOW-OVERHEAD, HIGH-COVERAGE FAULT TOLERANCE.
Vimal Reddy, Sailashri Parthasarathy and Eric Rotenberg

SLICK: SLICE-BASED LOCALITY EXPLOITATION FOR EFFICIENT REDUNDANT MULTITHREADING. Angshuman Parashar, Sudhanva Gurumurthi and Anand Sivasubramaniam

3-3:30 Break

3:30-4:30: Session 3: Energy Efficiency

MERCURY AND FREON: TEMPERATURE EMULATION AND MANAGEMENT FOR SERVER SYSTEMS.
Taliver Heath, Ana Centeno, Pradeep George, Yogesh Jaluria and Ricardo Bianchini.

PICOSERVER: USING 3D STACKING TECHNOLOGY TO ENABLE A COMPACT ENERGY EFFICIENT CHIP MULTIPROCESSOR.
Taeho Kgil, Shaun D'Souza, Ali Saidi, Nathan Binkert, Ronald Dreslinski, Steve Reinhardt, Krisztian Flautner and Trevor Mudge

4:30-6:30: Wild and Crazy Ideas Session
Food and Beverages sponsored by Google

7pm-8:30pm: ACM Business meeting

Tuesday, October 24, 2006

8:30-9: Breakfast

9:00-11:00am Session 4: Scheduling and Spatial Programming

A SPATIAL PATH SCHEDULING ALGORITHM FOR EDGE ARCHITECTURES.
Katherine Coons, Xia Chen, Sundeep Kushwaha, Kathryn McKinley and Doug Burger

INSTRUCTION SCHEDULING FOR A TILED ARCHITECTURE.
Martha Mercaldi, Steven Swanson, Andrew Petersen, Andrew Putnam, Andrew Schwerin, Mark Oskin and Susan Eggers

EXPLOITING COARSE-GRAINED TASK, DATA, and PIPELINE PARALLELISM IN STREAM PROGRAMS.
Michael I. Gordon, William Thies and Saman Amarasinghe

TARTAN: EVALUATING SPATIAL COMPUTATION FOR WHOLE PROGRAM EXECUTION.
Mahim Mishra, Timothy Callahan, Tiberiu Chelcea, Girish Venkataramani, Mihai Budiu and Seth Goldstein

11-11:30: Break

11:30-1:00: Session 5: Estimation and Prediction of Power and Performance

A PERFORMANCE COUNTER ARCHITECTURE FOR COMPUTING ACCURATE CPI COMPONENTS.
Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis and James E. Smith

ACCURATE AND EFFICIENT REGRESSION MODELING FOR MICROARCHITECTURAL PERFORMANCE AND POWER PREDICTION.
Benjamin Lee and David Brooks

EFFICIENTLY EXPLORING ARCHITECTURAL DESIGN SPACES VIA PREDICTIVE MODELING.
Engin Ipek, Sally McKee, Bronis de Supinski, Martin Schulz and Rich Caruana

1-2pm: Lunch
Almaden Concourse
Sponsored by vmware

2pm-3:30pm: Session 6A: Races and Memory Debugging II

COMPREHENSIVELY AND EFFICIENTLY PROTECTING THE HEAP.
Mazen Kharbutli, Xiaowei Jiang, Yan Solihin and Milos Prvulovic

HEAPMD: IDENTIFYING HEAP-BASED BUGS USING ANOMALY DETECTION.
Trishul Chilimbi and Vinod Ganapathy

RECORDING SHARED MEMORY DEPENDENCIES USING STRATA.
Satish Narayanasamy, Cristiano Pereira and Brad Calder

2pm-3:30pm: Session 6B: Emerging Technologies

A DEFECT TOLERANT SELF-ORGANIZING NANOSCALE SIMD ARCHITECTURE. 
Jaidev Patwardhan, Vijeta Johri, Chris Dwyer and Alvin Lebeck

A PROGRAM TRANSFORMATION AND ARCHITECTURE SUPPORT FOR QUANTUM UNCOMPUTATION.
Ethan Schuchman and T. N. Vijaykumar

INTROSPECTIVE 3D CHIPS.
Shashidhar Mysore, Banit Agrawal, Sheng-Chih Lin, Navin Srivastava, Kaustav Banerjee and Timothy Sherwood.

3:30-4pm Break

4pm-5:30pm: Session 7A: Memory and Locality Issues

STEALTH PREFETCHING.
Jason Cantin, Mikko Lipasti and James Smith

COMPUTATION SPREADING: EMPLOYING HARDWARE MIGRATION TO SPECIALIZE CMP CORES ON-THE-FLY.
Koushik Chakraborty, Philip Wells and Gurindar Sohi

SOFTWARE-BASED INSTRUCTION CACHING FOR EMBEDDED PROCESSORS.
Jason E Miller and Anant Agarwal

4pm-5:30pm: Session 7B: Embedded and Special-Purpose Systems

MAPPING ESTEREL ONTO A MULTI-THREADED EMBEDDED PROCESSOR.
Xin Li, Marian Boldt and Reinhard von Hanxleden

INTEGRATED NETWORK INTERFACES FOR HIGH-BANDWIDTH TCP/IP.
Nathan Binkert, Ali Saidi and Steven Reinhardt

ACCELERATOR: USING DATA-PARALLELISM TO PROGRAM GPUS FOR GENERAL-PURPOSE USES.
David Tarditi, Sidd Puri and Jose Oglesby

6PM-9PM Banquet and IMAX Showing
Tech Museum
Sponsored by AMD

Wednesday, October 25, 2006

8-8:30: Breakfast

8:30-10:30: Session 8: Transactional Memory

HYBRID TRANSACTIONAL MEMORY.
Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir and Dan Nussbaum

UNBOUNDED PAGE-BASED TRANSACTIONAL MEMORY.
Wei Chuang, Satish Narayanasamy, Ganesh Venkatesh, Jack Sampson, Michael Van Biesbrouck, Gilles Pokam, Osvaldo Colavin and Brad Calder

SUPPORTING NESTED TRANSACTIONS IN LOGTM.
Michelle Moravan, Jayaram Bobba, Kevin Moore, Luke Yen, Mark Hill, Ben Liblit, Michael Swift and David Wood

TRADEOFFS IN TRANSACTIONAL MEMORY VIRTUALIZATIONS.
JaeWoong Chung, Chi Cao Minh, Austen McDonald, Travis Skare, Hassan Chafi, Brian D Carlstrom, Christos Kozyrakis and Kunle Olukotun

10:30-11: Break

11:00am-1:00pm: Session 9: Compilation

A NEW IDIOM RECOGNITION FRAMEWORK FOR EXPLOITING HARDWARE-ASSIST INSTRUCTIONS.
Motohiro Kawahito, Hideaki Komatsu, Takao Moriyama, Hiroshi Inoue and Toshio Nakatani

AUTOMATIC GENERATION OF PEEPHOLE SUPEROPTIMIZERS.
Sorav Bansal and Alex Aiken

COMBINATORIAL SKETCHING FOR FINITE PROGRAMS.
 Armando Solar-Lezama, Liviu Tancau, David Turner, Rastislav Bodik, Vijay Saraswat and Sanjit Seshia

A PROBABILISTIC POINTER ANALYSIS FOR SPECULATIVE OPTIMIZATIONS.
Jeff Da Silva and J. Gregory Steffan