*
* Command Line:      ../test -d elliptic.dfg -f 1.2 -t 1 -l cbc9vx.libr
sample period =0
*
*  Reading CDFG from file "elliptic.dfg"
*
*
*  Reading LIBRARY from file "cbc9vx.libr"
ERROR: Line 70: Bad character/keyword/identifier
ERROR: Line 92: Bad character/keyword/identifier
*
Wire scale 1 Gate scale 1 Lamda scale 1
*  BEGIN LEVELIZING DFG...
*  END LEVELIZING DFG...
*
*  BEGIN SC_SIMULATION...
*

*
*  END SC_SIMULATION...
*
Sample constraint0
laxity factor is 1.2
* BEGIN LOW POWER SCHEDULING...
Sample constraint 0
*
Iterative improvement synthesis No.: 1, Vdd: 5, Contol Steps: 14
Fully parallel result:
Datapath::do_floorplan()  FU # = 33 Reg # = 52 Mux # = 118
 Datapath area efficiency: 0.609326 Total datapath area is 158582
Cost (Vdd = 5, csteps = 14) = 2.13617
Iterative improvement synthesis No.: 2, Vdd: 5, Contol Steps: 13
Fully parallel result:
Datapath::do_floorplan()  FU # = 33 Reg # = 52 Mux # = 118
 Datapath area efficiency: 0.609326 Total datapath area is 158582
Cost (Vdd = 5, csteps = 13) = 2.13617
Iterative improvement synthesis No.: 3, Vdd: 5, Contol Steps: 12
Fully parallel result:
Datapath::do_floorplan()  FU # = 33 Reg # = 52 Mux # = 118
 Datapath area efficiency: 0.609326 Total datapath area is 158582
Cost (Vdd = 5, csteps = 12) = 1.70716
OOPS - cannot meet constraint with Vdd: 5 control steps:11 best csteps possible: 12
OOPS - cannot meet constraint with Vdd: 5 control steps:10 best csteps possible: 12
Iterative improvement synthesis No.: 4, Vdd: 5, Contol Steps: 9
Fully parallel result:
Datapath::do_floorplan()  FU # = 33 Reg # = 52 Mux # = 118
 Datapath area efficiency: 0.609326 Total datapath area is 158582
Cost (Vdd = 5, csteps = 9) = 2.1759
Iterative improvement synthesis No.: 5, Vdd: 5, Contol Steps: 8
Fully parallel result:
Datapath::do_floorplan()  FU # = 33 Reg # = 52 Mux # = 118
 Datapath area efficiency: 0.609326 Total datapath area is 158582
Cost (Vdd = 5, csteps = 8) = 0.915927
Iterative improvement synthesis No.: 6, Vdd: 5, Contol Steps: 7
Fully parallel result:
Datapath::do_floorplan()  FU # = 33 Reg # = 52 Mux # = 118
 Datapath area efficiency: 0.609326 Total datapath area is 158582
Cost (Vdd = 5, csteps = 7) = 2.13617
OOPS - cannot meet constraint with Vdd: 5 control steps:6 best csteps possible: 7
OOPS - cannot meet constraint with Vdd: 5 control steps:5 best csteps possible: 7
* END LOW POWER SCHEDULING...
Best solution at Vdd: 5 sample period: 192 control steps: 8
Final after floorplanning: 
Note: the VDD of the lib energy data is not known. Assumed 1 V
Datapath::do_floorplan()  FU # = 12 Reg # = 24 Mux # = 48
 Datapath area efficiency: 0.682689 Total datapath area is 62728.5
Datapath::compute_sccost()  Logic Energy in pJoule = 183.185  Wire Energy in pJoule = 52.5183  Mux Energy in pJoule = 33.3147
 TOTAL = 269.018
 Gated num = 54 Switching num = 80
 Gating overhead energy 9.19098 area  139.968
 wire energy computed by output network is 31.4602
 wire energy of shared wire is 31.6872 reduced is 21.8267
 NC = 3.0896
Total Power = 1.40114
Total Energy = 269.018
Wire energy is 52.5183
Mux energy is 33.3147
Logic energy is 183.185
Reduced module energy is 106.579
Reduced wire energy is 23.2943
Shared wire energy would be 31.6872 reduced is 21.8267
MST wire energy would be 31.4602
Reduced mux energy is 14.7172
Time used in ms = 21000
Time used by clockticking = 23
