For the 7 years between when I got my B.S. from Virginia Tech and when I started my Ph.D. at Princeton, I worked for Xilinx in Boulder, CO. There, I worked on various projects.
During the first 3 years, I worked on "run-time reconfigurable computing." It's an idea that since FPGAs are programmable, you can change the circuit at run-time. Kind of giving software like features to hardware. For this I was part of the team to develop JBits. JBits is an API that allows for direct manipulation of the configuration stream. We built layers on top of it, mine in particular was a router. I also developed several applications that demonstrated the use of RTR - including Smith-Waterman, Viterbi, and Wavelet transform. Extending upon this idea, when the embedded PowerPC came out on the Virtex2 Pro, I was part of the team to port some of the ideas to the embedded processor, creating a self-reconfiguring device.
For the next year or so, I worked in a similar area but with a more systems approach. I worked on creating a slot-based architecture (where a slot is a portion of an FPGA) where users could create modules that could be loaded into any slot. I then worked on the software methodology where these modules are part of libraries and coupled to software (so embedded in an object file). The link phase (static or dynamic) of compiling software, would instantiate the necessary hardware modules.
From then on I worked in networking, creating an domain specific design flow, as opposed to traditional hardware design through an HDL. The main outcome were two languages - one to stitch together modules in a system and another to design modules. The stitcher is strongly based on language Click uses to describe the graph of elements.