LAB 5
Today we will continue working on the Proto-Board Computers.
- Complete wiring of power/ground, data lines, low address lines
- Design/Test Address Decode Logic (ADL) for your computer.
- Some useful documents can be found on the circuits page of the website
- Draw a logic table for each of the chips connected to the ADL. Choose the logic signals necessary to select each chip and the logic level of ADL output that will select it. The memory map that was discussed in lecture is very useful to determine these inputs.
- Design a set of logic gates that correspond to the logic tables to created above. Note: you only have NAND and NOT chips available to create your ADL.
- Add a double inverter to the PHI2
when using it in the ADL. The output of this double inverter will serve as
the PHI2 line for the address decode logic and for the VIA/ACIA. (In
class we referred to this buffered PHI2 line as PHI2*.)
- Some questions to consider when designing the ADL: What are the logic levels of CS1 and /CS2 on the VIA (CS0 and /CS1 on the ACIA) in order for it to be selected? How do you select the devices separately? There are a number of ways to do this.
- Draw address decode logic for EPROM, RAM, TIL 311 DISPLAY, VIA, and ACIA using ORCAD (see example on circuits page). Follow the naming convention "ADL_bench_#".
- Review your plan for the address decode logic with
your lab instructor after you have printed it out.
- Submit the DSN file on blackboard.
- Wire up and test
the logic on the bottom of your trainer board. Select gates that are of the "Schottky" type
-- eg. 74S00. Use Data Switches
to simulate address lines (A15, A14, and A13) and clock line (PHI2). Use
LED displays on trainer to view the five chip enables. Confirm the truth tables expected for each chip. Don't forget to run PHI2 through a double inverter. The output of the
double inverter is PHI2*. When you believe that it is working as intended, have it checked by an instructor.
- Take care of the /IRQ and /NMI lines as discussed in
class. Don't forget the pull-up resistor on /IRQ (2.7~3.3Kohms). (Note the prefix
of "/" should be read as 'not' -- therefore /IRQ is 'not IRQ' or as we
sometimes say in class 'IRQ - bar'.) /IRQ on the 6502 connects to
the /IRQ line on the VIA but not the ACIA. /NMI on the 6502 needs to be tied to
+5V or ground (which?).
- Deal with RDY, SYNC, S.O. pins on the 6502. Read the
data sheet on the 6502 to figure these out. Where does the clock go?
- Wire the /RES lines of the CPU, VIA, and ACIA to a Pulse
Switch on your trainer.
- Don't forget the Vpp line on the EPROM.
- Add the address decode logic to your computer by connecting the control lines to the appropriate chips.
- Add a de-coupling capacitor (at least 10μF)
between power and ground (be careful; this capacitor is polarized -- don't
get it backwards!) on the power bus at the point closest to the power pins
on the trainer. Add at least 4 or 5 de-spiking capacitors (0.1μF)
at random locations on each power bus.
- Connect the R/W line from the 6502 to both the VIA and the ACIA.
(The R/W line is also needed by the RAM -- figure out to which pin on the
RAM it connects.) Make sure also that the VIA and ACIA each have PHI2* connected.
- Check over every pin of every chip to see that you
have either hooked it up or tied it to an appropriate level (HIGH or LOW).
(Don't forget to deal with the PGM and /OE pins of the EPROM -- you need
to figure out how they are to be connected.) Unused outputs do not
need to be hooked up. Unused inputs should be tied to a logic level.
Double check your powers and grounds.
- Have your lab instructor check over your board -- remove
the VIA, ACIA, and the RAM chips -- program an EPROM with the basic test program --
rev your engines -- hold your breath -- power it up, press the /RES button, and
pray. If smoke starts pouring out of your computer -- turn it off. Show this
to your lab instructor, who will make a note of a working EPROM/MPU test on the
progress sheet.
Do not erase any of your 27C64 EPROMS! You will need these test programs till the end of the semester. That is why you have 3 of them. After burning a program into the chip, get a label from staff to ID it.