Margaret Martonosi's Publications


The papers below are subject to ACM, IEEE, or other copyrights as noted in the paper's text.

Pei Zhang, Christopher M. Sadler, Stephen Lyon, and Margaret Martonosi. Hardware Design Experiences in ZebraNet. ACM SenSys '04. [pdf]

Qiang Wu, Philo Juang, Margaret Martonosi, and Douglas W. Clark. Formal Online Methods for Voltage/Frequency Control in Multiple Clock Domain Microprocessors. ASPLOS 2004. [pdf]

Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Philip W. Diodato, and Stefanos Kaxiras. Implementing Branch Predictor Decay USing Quasi-Static Memory Cells. Transactions on Computer Architecture (TACO). June, 2004 [pdf] [ps]

Ting Liu, Christopher Sadler, Pei Zhang and Margaret Martonosi. "Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet". The Second International Conference on Mobile Systems, Applications, and Services (MobiSYS'04). June, 2004 [pdf]

Gilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju and Guei-Yuan Lueh. "XTREM: A Power Simulator for the Intel XScale Core", The 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04) June 2004 [pdf]

Russ Joseph, Margaret Martonosi, and Zhigang Hu. Spectral Analysis for Characterizing Program Power and Performance. Intl. Symposium on Performance Analysis for Systems and Software 2004. February, 2004. [pdf]

Russ Joseph, Zhigang Hu, and Margaret Martonosi. Wavelet Analysis for Microprocessor Design: Experiences with dI/dt Based Wavelet Chracterization. Tenth International Symposium on High Performance Computing (HPCA-10). February, 2004. Madrid, Spain. [ps][pdf]

Canturk Isci and Margaret Martonosi. "Identifying Program Power Phase Behavior Using Power Vectors", the 6th Annual Workshop on Workload Characterizations. November 2003 [pdf]

Canturk Isci and Margaret Martonosi. "Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data", the 36th Annual ACM/IEEE International Symposium on Microarchitecture. December 2003 [pdf]

Fen Xie, Margaret Martonosi and Sharad Malik. "Compile-Time Dynamic Voltage Scaling Settings: Opportunities and Limits", Programming Language Design and Implementation (PLDI 2003), June 2003. [(ps) (pdf)]

Ting Liu and Margaret Martonosi. "Impala: A Middleware System for Managing Autonomic, Parallel Sensor Systems". ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP'03), June 2003.[(ps) (pdf)]

Zhigang Hu, Stefanos Kaxiras and Margaret Martonosi. "Improving Cache Power Efficiency with an Asymmetric Set-Associative Cache." High Performance Memory Systems, Springer Verlag. (ps) (pdf)

Zhigang Hu, Stefanos Kaxiras and Margaret Martonosi. "Timekeeping Techniques for Predicting and Optimizing Memory Behavior". The 2003 IEEE International Solid-State Circuits Conference (ISSCC 2003) . February 2003.

Zhigang Hu, Margaret Martonosi and Stefanos Kaxiras. "TCP: Tag Correlating Prefetchers". Ninth International Conference on High Performance Computer Architecture (HPCA2003). (ps) (pdf)

Russ Joseph, David Brooks, and Margaret Martonosi, "Control Techniques to Eliminate Voltage Emergencies in High Performance Processors" The Ninth International Symposium on High Performance Computer Architecture (HPCA-9), February 2003. (ps) (pdf)

Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi, Doug W. Clark. "Implementing Decay Techniques Using 4T Quasi-Static Cells". Computer Architecture Letters, Volume 1. September, 2002. (pdf)

Philo Juang, Hidekazu Oki, Yong Wang, Margaret Martonosi, Li-Shiuan Peh, and Daniel Rubenstein. "Energy-Efficient Computing for Wildlife Tracking: Design Tradeoffs and Early Experiences with ZebraNet". the Tenth International Conference on Architectural Support for Programming Languages and Operating Systems. October, 2002. (ps) (pdf)

Zhigang Hu. "The Timekeeping Methodology: Exploiting Generational Lifetime Behavior to Improve Processor Power and Performance". Ph.D. thesis, Department of Electrical Engineering, Princeton University, September, 2002.[pdf]

Zhigang Hu, Philo Juang, Kevin Skadron, Margaret Martonosi, and Doug Clark. "Applying Decay Strategies to Branch Predictors for Leakage Energy Savings". 2002 International Conference on Computer Design. September, 2002. (pdf)

Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, and Douglas W. Clark. "Managing Leakage for Transient Data: Decay and Quasi-Static 4T Memory Cells". the 2002 International Symposium on International Symposium on Low Power Electronics and Design. August, 2002. (ps) (pdf)

Zhigang Hu, Stefanos Kaxiras, and Margaret Martonosi. "Let Caches Decay: Reducing Leakage Energy via Exploitation of Cache Generational Behavior". ACM Transaction on Computer Systems. May, 2002 . (pdf)

Zhigang Hu, Stefanos Kaxiras, and Margaret Martonosi. "Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior". the 29th International Symposium on Computer Architecture. May, 2002. (ps) (pdf)

Stefanos Kaxiras, Girija Narlikar, Alan D. Berenbaum, and Zhigang Hu. "Comparing Power Consumption of SMT DSPs and CMP DSPs for Mobile Phone Workloads". International Conference on Compilers, Architectures and Synthesis for Embedded Systems. November, 2001. (ps) (pdf)

Russ Joseph and Margaret Martonosi. "Run-time Power Estimation in High-Performance Microprocessors". the 2001 International Symposium on Low Power Electronics and Design. (ps) (pdf)

Zhigang Hu, Stefanos Kaxiras, and Margaret Martonosi. "Improving Cache Power Efficiency with an Asymmetric Set-Associative Cache". Workshop on Memory Performance Issues (in conjunction with ISCA-28). June, 2001. (ps) (pdf)

Russ Joseph, David Brooks, and Margaret Martonosi. "Live, Runtime Power Measurements as a Foundation for Evaluating Power/Performance Tradeoffs". Workshop on Complexity Effectice Design (in conjunction with ISCA-28). June, 2001. (ps) (pdf)

Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi. "Cache Decay: Exploiting Generational Behaviour to Reduce Cache Leakage Power". the 28th International Symposium on Computer Architecture. June, 2001. (pdf)

Hongli Zhang and Margaret Martonosi. "A Mathematical Cache Miss Analysis for Pointer Data Structures". SIAM Conference on Parallel Processing for Scientific Computing. March, 2001. (pdf)

David Brooks and Margaret Martonosi. "Dynamic Thermal Management for High-Performance Microprocessors". Seventh International Symposium on High-Performance Computer Architecture. January, 2001. (ps) (pdf)

David Brooks, Pradip Bose, Stanley Schuster, Hans Jacobson, Prabhakar N. Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor Zyuban, Manish Gupta, and Peter W. Cook. "Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors". .

David Brooks, John-David Wellman, Pradip Bose, and Margaret Martonosi. "Power-Performance Modeling and Tradeoff Analysis for a High-End Microprocessor". Workshop on Power-Aware Computer Systems (in conjunction with ASPLOS-IX). November, 2000. (ps) (pdf)

Stefanos Kaxiras, Zhigang Hu, Girija Nalikar, Rae McLellan. "Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power". Workshop on Power-Aware Computer Systems (in conjuction with ASPLOS-IX). November, 2000.

Alper Buyuktosunoglu, Stanley Schuster, David Brooks, Pradip Bose, Peter Cook, David H Albonesi. "An Adaptive Issue Queue for Reduced Power at High Performance ". Workshop on Power-Aware Computer Systems (in conjuction with ASPLOS-IX). November, 2000. (ps)

Darko Stefanovic and Margaret Martonosi. "Limits and Graph Structure of Available Instruction-Level Parallelism". European Conference on Parallel Computing. August-September, 2000. (pdf)

Darko Stefanovic and Margaret Martonosi. "On Availability of Bit-narrow Operations in General-purpose Applications". The 10th International Conference on Field Programmable Logic and Applications. August, 2000. (pdf)

David Brooks and Margaret Martonosi. "Adaptive Thermal Management for High-Performance Microprocessors". Workshop on Complexity Effectice Design (in conjunction with ISCA-27). June, 2000. (ps)

Zhigang Hu and Margaret Martonosi. "Reducing Register File Power Consumption by Exploiting Value Lifetime Characteristics". Workshop on Complexity Effectice Design (in conjunction with ISCA-27). June, 2000. (ps)

David Brooks, Vivek Tiwari, and Margaret Martonosi. "Wattch: A Framework for Architectural-Level Power Analysis and Optimizations". the 27th International Symposium on Computer Architecture. June, 2000. (ps) (pdf)

David Brooks and Margaret Martonosi. "Value-Based Clock Gating and Operation Packing: Dynamic Strategies for Improving Processor Power and Performance". ACM Transactions on Computer Systems, May 2000 . (pdf)

Zhen Luo, Margaret Martonosi and Pranav Ashar. "An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking". the Annual IEEE Symposium on FPGAs for Custom Computing Machines. (pdf)

Zhen Luo, Margaret Martonosi and Pranav Ashar. "An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI Layout Design Rule Checking". VLSI Design. Volume 10, No.3, P.249-263. March, 2000.

Zhen Luo and Margaret Martonosi. "Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques". IEEE Trans. Computers, 2000.

Somnath Ghosh, Margaret Martonosi, and Sharad Malik. "Cache Miss Equations: A Compiler Framework for Analyzing and Tuning Memory Behavior". ACM Transactions on Programming Languages and Systems . July, 1999 (pdf)

David Brooks and Margaret Martonosi. "Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware". Cache-Coherence Protocols in Configurable Hardware. Workshop on Communications, Architecture, and Applications for Network-based Parallel Computing (in conjunction with HPCA-5). January, 1999. (ps)

David Brooks and Margaret Martonosi. "Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance". HPCA-5, 1999. (pdf)

Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, and Douglas W. Clark. "Improving Prediction for Procedure Returns with Return-Address-Stack Repair Mechanisms". the 31st Annual ACM/IEEE International Symposium on Microarchitecture. November, 1998. (ps)

Zhen Luo and Margaret Martonosi. "Using Delayed Addition to Accelerate Integer and Floating-Point Arithmetic on FPGAs". SPIE Conference on Configurable Computing - Technology and Applications. November, 1998. (ps)

Peixin Zhong, Margaret Martonosi, Sharad Malik, and Pranav Ashar. "Solving Boolean Satisfiability with Dynamic Hardware Configurations". Eighth International Workshop on Field Programmable Logic and Applications. August, 1998. (ps)

Margaret Martonosi, Scott Karlin, Cheng Liao, Douglas W. Clark. "Performance Monitoring Infrastructure in the Shrimp Multicomputers". International Journal of Parallel and Distributed Systems and Networks. Invited paper, special issue on "Measurement of Program and System Performance". 1998 .

Somnath Ghosh, Margaret Martonosi, and Sharad Malik. "Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity". the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems. October, 1998. (ps)

Cheng Liao, Margaret Martonosi, and Douglas W. Clark. "Performance Monitoring in a Myrinet-Connected Shrimp Cluster". 1998 ACM Sigmetrics Symposium on Parallel and Distributed Tools. August, 1998. (ps)

Cheng Liao, Dongming Jiang, Margaret Martonosi, Douglas W. Clark, and Liviu Iftode. "Monitoring Shared Virtual Memory on a Myrinet-based PC Cluster". the 12th ACM International Conference on Supercomputing (ICS). July, 1998. (ps)

Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, and Douglas W. Clark. "Multi-Path Execution: Opportunities and Limits". the 12th ACM International Conference on Supercomputing (ICS). July, 1998. (ps)

Matthias A. Blumrich, Richard D. Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li, Margaret Martonosi, and Robert A. Shillner. "Design Choices in the SHRIMP System: An Empirical Study". the 25th International Symposium on Computer Architecture. June, 1998. (ps)

Peixin Zhong, Margaret Martonosi, Pranav Ashar and Sharad Malik. "Using Configurable Computing to Accelerate Boolean Satisfiability". IEEE Transactions on CAD. 1998 . (ps)

Peixin Zhong, Pranav Ashar, Sharad Malik, and Margaret Martonosi. "Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability". Design Automation Conference. June, 1998. (ps)

Peixin Zhong, Margaret Martonosi, Pranav Ashar, and Sharad Malik. "Accelerating Boolean Satisfiability with Configurable Hardware". . (ps)

Mary W. Hall and Margaret Martonosi. "Adaptive Parallelism in Compiler-Parallelized Code". Concurrency - Practice and Experience. 1998 .

Mark Horowitz, Margaret Martonosi, Todd C. Mowry, and Michael D. Smith. "Informing Memory Operations: Memory Performance Feedback Mechanisms and their Applications". ACM Transactions on Computer Systems. May, 1998. (ps)

Somnath Ghosh, Margaret Martonosi and Sharad Malik. "Cache Miss Equations: An Analytical Representation of Cache Misses". the 11th ACM International Conference on Supercomputing (ICS). July, 1997. (ps)

Sharad Malik, Margaret Martonosi, Yau-Tsun Steven Li. "Static Timing Analysis of Embedded Software". .

Peixin Zhong and Margaret Martonosi. "Using Reconfigurable Hardware to Customize Memory Hierarchies". SPIE Conference on Reconfigurable Technology for Rapid Product Development and Computing. November, 1996.

Mark Horowitz, Margaret Martonosi, Todd C. Mowry, and Michael D. Smith. "Memory Performance Feedback Mechanisms in Modern Processors". the 23rd International Symposium on Computer Architecture. May, 1996. (ps)

Margaret Martonosi, Douglas W. Clark, and Malena Mesarina. "The SHRIMP Hardware Performance Monitor: Design and Applications". 1996 ACM Sigmetrics Symposium on Parallel and Distributed Tools. May, 1996. (ps)

Per Stenstrom, Erik Hagersten, David Lilja, Margaret Martonosi, and Madan Venugopal. "Shared-Memory Multiprocessing: Significant Issues and Research Needs". IEEE Computer, 1997.

Somnath Ghosh, Margaret Martonosi and Sharad Malik. "Cache Miss Equations: An Analytical Representation of Cache Misses". IEEE TCCA Newsletter. June, 1997.

Margaret Martonosi and Kelly Shaw. "Interactions between Application Write Performance and Compilation Techniques: A Preliminary View". IEEE TCCA Newsletter. June, 1997.

Margaret Martonosi, David Ofelt, and Mark Heinrich. "Integrating Performance Monitoring and Communication in Parallel Computers". 1996 ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems. May, 1996.

Evan Torrie, Margaret Martonosi, Chau-Wen Tseng, and Mary W. Hall. "Characterizing the Memory Behavior of Compiler-Parallelized Applications". IEEE Transactions on Parallel and Distributed Systems. Volume 7, No. 12. December, 1996. (ps)

Evan Torrie, Margaret Martonosi, Mary W. Hall, and Chau-Wen Tseng. "Memory Referencing Behavior in Compiler-Parallelized Applications". International Journal of Parallel Programming. Volume 24, No. 4. August, 1996.

Evan Torrie, Chau-Wen Tseng, Margaret Martonosi, and Mary W. Hall. "Evaluating the Memory System Behavior of Compiler-Parallelized Codes on Multiprocessors". International Conference on Parallel Architectures and Compilation Techniques. June, 1995. (ps)

Margaret Martonosi, Anoop Gupta, and Thomas E. Anderson. "Tuning Memory Performance in Sequential and Parallel Programs". IEEE Computer. April, 1995. (ps)

Margaret Martonosi, Anoop Gupta, and Thomas E. Anderson. "Effectiveness of Trace Sampling for Performance Debugging Tools". 1993 ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems. May, 1993. (ps)

Margaret Martonosi, Anoop Gupta, and Thomas E. Anderson. "MemSpy: Analyzing Memory System Bottlenecks in Programs". 1992 ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems. June, 1992. (ps)

Margaret Martonosi and Anoop Gupta. "Tradeoffs in Message Passing and Shared Memory Implementations of a Standard Cell Router". Proceedings of the 1989 International Conference on Parallel Processing. August, 1989. (ps)