Publications

Conference Papers

In-Network Coherence Filtering: Snoopy Coherence without Broadcasts [abstract] [paper (PDF)]
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), New York City, December 2009
Accept rate: 24% (52/210)

In-Network Snoop Ordering (INSO): Snoopy Coherence on Unordered Networks [abstract] [paper (PDF)]
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
15th International Conference on High-Performance Computer Architecture (HPCA), Raleigh, North Carolina, February 2009
Accept rate: 19% (35/184)

GARNET: A Detailed On-Chip Network Model inside a Full-System Simulator [abstract] [paper (PDF)]
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Niraj K. Jha
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Boston, Massachusetts, April 2009
Accept rate: 28% (24/86)

CMOS Logic Design with Independent-gate FinFETs [abstract] [paper (PDF)]
Anish Muttreja, Niket Agarwal, Niraj K. Jha
25th International Symposium on Computer Design (ICCD), Lake Tahoe, California, October 2007
Accept rate: 33%

Embedded Support Vector Machine [abstract] [paper (PDF)]
Soumyajit Dey, Monu Kedia, Niket Agarwal, Anupam Basu
25th International Conference on VLSI Design (VLSID), Bangalore, India, January 2007
Accept rate: 32% (141/444)

Workshop Papers

Comparison of Physical Express Topologies and Virtual Express Topologies for future Many-core On-chip Networks [paper (PDF)]
Chia-Hsin Owen Chen (Princeton), Niket Agarwal (Princeton), Tushar Krishna (Princeton), Kyung-Hoae Koo (Stanford), Li-Shiuan Peh (Princeton), Krishna C. Saraswat (Stanford)
3rd Workshop on Chip Multiprocessor Memory Systems and Interconnects (CMP-MSI), held in conjunction with ISCA-36, Austin, Texas, June 2009

A System Level Perspective for Efficient NoC Design [paper (PDF)]
Amit Kumar, Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
NSF Workshop on Next Generation Software (NGS), held in conjunction with IPDPS, Miami, Florida, April 2008

Power Estimation of Synchronous Sequential Circuits
Niket Agarwal, Ashish Chordia, Indranil Sengupta
Finalist in Intel India Student Research Contest (IISRC), Bangalore, India, June 2006

Technical Reports

GARNET: A Detailed Interconnection Network Model inside a Full-system Simulation Framework [paper (PDF)]
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
Technical Report (TR), CE-P08-001, Dept. of Electrical Engineering, Princeton University, February 2008