Li-Shiuan Peh
Associate Professor of Electrical Engineering
Princeton University
Ph.D. Stanford University
B.S. National University Singapore
Research Interests
Interconnection networks (networks connecting
subsystems within a digital system, such as multiprocessors, blades, disks,
clusters, router line cards, on-chip modules, embedded systems, etc); more
specifically power-aware interconnection networks; Parallel architectures and
networking in general.
Tool Releases
ORION: A power-performance
simulator for interconnection networks
Leakage power models of
interconnection networks by Xuning Chen (Incorporated
into Orion)
LUNA: High-level power
analysis of networks
Synthesizable
router verilog (released to multi-university RAMP project, as well as projects at
Polaris: System-Level Roadmapping for On-Chip Networks
Garnet: A Detailed Interconnection Network Model inside a Full-system Simulation Framework
Professional Service
Topic Co-Chair, Design Automation and Test in Europe (DATE), March 2008.
Guest Co-Editor, IEEE Micro Special Issue on Interconnects for Multi-Core Chips, September/October 2007.
Program Co-Chair, IEEE International Symposium on
Networks-on-Chip, NOCS 2007.
Program Vice-Chair,
Power-aware and reliable computing tra
Co-guest editor,
Special issue of IEEE Transactions on Parallel and Distributed Systems on
On-chip Networks, with Prof. T. Pinkston, 2005 (CFP).
Program Committee Member,
Conferences: HIPEAC 2009, HPCA 2009, MICRO 2008, ICCAD 2008, DAC 2008, NOCS 2008, ASPLOS 2008, CASES 2007, ANCS 2007, DAC 2007, HPCA 2007, MICRO 2006, ISCA 2006, HPCA 2006, ANCS 2005, HiPC 2005,
SIGMETRICS 2004, ICPADS 2004, HiPC 2004, HPCA 2004, Hot Interconnects 2003,
ICPP 2003, HPCA 2003.
Program Committee
Member, Workshops: dasCMP (MICRO 2007), ASGI (ISCA 2007), TACS (ISCA 2006), ASGI (ISCA 2006), dasCMP (MICRO 2005),
TACS (ISCA 2005), PACS (MICRO 2004), TACS (ISCA 2004), SAN (HPCA 2003), SNAPI
(PACT 2003)
Selected Talks
Panelist, NSF-sponsored panel on “Future of
Computer Architecture Research”, (June 8th 2003). [Slides]
Panelist, MARCO Center Workshop on
“Chip-Scale Power Scaling”, Stanford University, (March 13th
2004). [Slides]
Speaker, Distinguished Faculty Lecture
Series, "A Happy Family of Computation and Communication", University
of Texas at Austin, Department of Computer Sciences, (December 12-14 2005). [Slides]
Speaker, Stanford NSF On-Chip Interconnection Networks Workshop,
, "Low-power Interconnection Networks", Stanford University, (December 6-7 2006). [Slides]
Speaker, MARCO Microarchitecture (C2S2 and GSRC) workshop,
, "Towards an Ideal Interconnection Fabric for Many-Core Chips", Pheonix, Arizona, (February 10 2007). [Slides]
Awards
National Science
Foundation CAREER Award (2003) - "Self-Regulating Power-Aware
Interconnection Networks"
Princeton School of
Engineering and Applied Sciences E. Lawrence Keys/Emerson Electric Co. Faculty
Advancement Award (2004)
Sloan Research
Fellowship (2006)
CRA-W Anita
Borg Early Career Award (2007)
Publications
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh and Niraj K. Jha,
"
GARNET: A Detailed On-Chip Network Model inside a Full-System Simulator
"
In Proceedings of IEEE International Symposium on Performance Analysis
of Systems and Software (ISPASS),
Boston, Massachusetts, April 2009.
Andrew Kahng, Bin Li, Li-Shiuan Peh and Kambiz Samadi,
"
ORION 2.0: A Fast and Accurate NoC Power and Area Model
for Early-Stage Design Space Exploration
"
In Proceedings of Design Automation and Test in Europe (DATE),
Nice, France, April 2009.
Niket Agarwal, Li-Shiuan Peh and Niraj K. Jha,
"
In-Network Snoop Ordering: Snoopy Coherence on Unordered Interconnects
"
In Proceedings of 15th International Symposium on High-Performance
Computer Architecture
(HPCA), Raleigh, North Carolina, February 2009.
Amit Kumar, Li-Shiuan Peh and Niraj K. Jha,
"
Token Flow Control
"
In Proceedings of 41st International Symposium on Microarchitecture
(MICRO), Lake Como, Italy, November 2008.
Natalie Enright-Jerger, Li-Shiuan Peh and Mikko Lipasti,
"
Virtual Tree Coherence: Leveraging Regions and In-Network Multicast
Trees for Scalable Cache Coherence
"
In Proceedings of 41st International Symposium on Microarchitecture
(MICRO), Lake Como, Italy, November 2008.
Noel Eisley, Li-Shiuan Peh and Li Shang,
"
Leveraging On-Chip Networks for Cache Migration in Chip Multiprocessors
"
In Proceedings of 17th International Conference on
Parallel Architectures and Compilation Techniques (PACT), Toronto,
Canada, October 2008.
Konstantinos
Aisopos, Chien-Chun Chou and Li-Shiuan Peh,
"
Extending Open Core Protocol to Support System-Level Cache Coherence
"
In Proceedings of
International Conference on Hardware-Software Codesign and System
Synthesis (CODES+ISSS), Atlanta, Georgia, October 2008.
Tushar
Krishna, Amit Kumar, Patrick Chiang, Mattan Erez and Li-Shiuan Peh,
"
NoC with Near-Ideal Express Virtual Channels Using Global-Line
Communication
"
In Proceedings of Hot Interconnects (HOTI), Stanford, California, August 2008.
Xuning Chen, Gu-Yeon Wei and Li-Shiuan Peh,
"
Design of Low-Power Short-Distance Opto-Electronic Transceiver Front-Ends with Scalable Supply Voltages and Frequencies
"
In Proceedings of the International Symposium on Low Power and Energy Design (ISLPED), Bangalore India, August 2008.
Natalie
Enright-Jerger, Li-Shiuan Peh, and Mikko H. Lipasti,
"
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support"
In Proceedings of the International Symposium on Computer Architecture (ISCA), Beijing China, June 2008.
Natalie
Enright-Jerger, Li-Shiuan Peh, and Mikko H. Lipasti,
"
Circuit-Switched Coherence"
In Proceedings of the IEEE International Symposium on Networks-on-Chip (NOCS), Newcastle UK, April 2008.
Bin Li, Li-Shiuan Peh, and Priyadarsan Patra,
"
Impact of Process and Temperature Variations on Network-on-Chip Design Exploration"
In Proceedings of the IEEE International Symposium on Networks-on-Chip (NOCS), Newcastle UK, April 2008.
Amit Kumar, Li-Shiuan Peh, Partha Kundu and Niraj K. Jha,
"
Towards Ideal On-Chip Communication Using Express Virtual Channels", In
IEEE Micro Top Picks of Architecture Conferences, Jan/Feb 2008 (10 accepted out of 70 submissions from top architecture conferences).
Amit Kumar, Partha Kundu, Arvind Singh, Li-Shiuan Peh and Niraj K. Jha,
"
A 4.6Tbits/s 3.6GHz Single-cycle NoC Router with a Novel Switch Allocator in 65nm CMOS ", In
25th International Conference on Computer Design, October 2007.
John D.
Owens, William J. Dally, Ron Ho, D.N. (Jay) Jayasimha, Stephen W.
Keckler and Li-Shiuan Peh,
"
Research Challenges for On-Chip Interconnection Networks", In
IEEE Micro, Special Issue on On-Chip Interconnects for Multicores,
September/October 2007.
Natalie Enright-Jerger, Mikko Lipasti and Li-Shiuan Peh,
"
Circuit-Switched Coherence", In
IEEE Computer Architecture Letters, vol. 6, no. 1, Mar. 2007.
Amit Kumar, Li-Shiuan Peh, Partha Kundu and Niraj K. Jha,
"
Express Virtual Channels: Towards the Ideal Interconnection Fabric", In
Proceedings of the 34th International Symposium on Computer Architecture (ISCA),
San Diego, June 2007.
Noel Eisley, Li-Shiuan Peh and Li Shang, "In-Network
Cache Coherence", In
Proceedings of the 39th International Symposium on Microarchitecture
(MICRO), Orlando, Florida, December 2006.
Vassos Soteriou,
Noel Eisley, and Li-Shiuan
Peh, "Software-Directed
Power-Aware Interconnection Networks". In ACM
Transactions on Architecture and Code Optimization (TACO).
Noel
Eisley, Vassos Soteriou, and Li-Shiuan Peh,
"High-Level
Power Analysis for Multi-Core Chips". In
Proceedings of the 9th International Conference on Compilers, Architecture and
Synthesis for Embedded Systems (CASES),
Vassos Soteriou,
Noel Eisley, Hangsheng
Wang, Bin Li, and Li-Shiuan Peh, "Polaris: A
System-Level Roadmap for On-Chip Interconnection Networks". In Proceedings of the 24th International Conference on Computer
Design (ICCD),
Yong Wang, Margaret Martonosi, and Li-Shiuan Peh,
"Supervised
Learning in Sensor Networks: New Approaches with Routing, Reliability
Optimizations", In Proceedings of IEEE Conference on Sensor, Mesh and
Ad Hoc Communications and Networks (SECON),
Yong Wang, Chieh-Yih Wan, Margaret Martonosi,
and Li-Shiuan Peh, "Transport Layer
Approaches for Improving Idle Energy in Challenged Sensor Networks",
In Proceedings of ACM SIGCOMM Workshop on Challenged Networks (CHANTS), Pisa,
Italy, September 2006.
Yong Wang, Margaret Martonosi, and Li-Shiuan Peh,
"Situation-aware
Caching Strategies in Highly Varying Mobile Networks", In Proceedings
of IEEE International Symposium on Modeling, Analysis, and Simulation of
Computer and Telecommunication Systems (MASCOTS), Monterey, California,
September 2006.
Vassos Soteriou,
Hangsheng Wang, and Li-Shiuan
Peh, "A
Statistical Traffic Model for On-Chip Interconnection Networks". In Proceedings of the IEEE International Symposium on Modeling,
Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS),
Amit Kumar, Li Shang, Li-Shiuan Peh and Niraj K. Jha, "HybDTM: A Coordinated Hardware-Software Approach for
Dynamic Thermal Management", In Proceedings of the 43rd Design
Automation Conference (DAC),
Yong Wang, Margaret Martonosi and Li-Shiuan Peh, "Supervised Learning in Sensor Networks: New Approaches with Routing, Reliability Optimizations", In ACM/SIGMOBILE Workshop on Multi-hop Ad hoc Networks: from theory to reality (REALMAN), held in conjunction with MobiHoc, May 2006.
Vassos Soteriou and Li-Shiuan Peh, "Exploring the Design Space of Self-Regulating Power-Aware On/Off Interconnection Networks", accepted for publication in IEEE Trans. on Parallel and Distributed Systems (TPDS), April 2006.
Noel Eisley,
Li-Shiuan Peh and Li Shang, "In-Network
Cache Coherence", In Computer Architecture Letters, March 2006.
Jiong Luo, Niraj K. Jha, and Li-Shiuan Peh, "Simultaneous dynamic voltage scaling of processors and communication links in real-time distributed embedded systems", accepted for publication in IEEE Trans. on VLSI Systems (TVLSI), March 2006.
Li Shang, Li-Shiuan Peh, Amit Kumar and Niraj K. Jha, "Thermal-aware
On-Chip Networks", In IEEE Micro Top Pi
Julia Chen, Philo Juang, Kevin Ko, Gilberto
Contreras, David Penry, Ram Rangan,
Adam Stoler, Li-Shiuan Peh
and Margaret Martonosi, "Hardware-Modulated
Parallelism", In Proceedings of the Workshop on Design, Architecture
and Simulation of Chip Multiprocessors (dasCMP), held
in conjunction with MICRO, November 2005 (to appear in Computer Architecture
News, December 2005).
Yong Wang, Margaret Martonosi, and Li-Shiuan Peh,
"A New
Scheme on Link Quality Prediction and its Applications to Metric-Based Routing",
in Proceedings of ACM SenSys, pp. 288-289, San Diego,
CA, November 2005 (poster).
Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh and Doug Clark, "Formal
control techniques for power-performance management", In IEEE Micro,
Vol. 25, Iss. 5, Special Issue on
Low-power processors and technology, September/October 2005.
Vassos Soteriou,
Noel Eisley and Li-Shiuan
Peh, "Software-Directed
Power-Aware Interconnection Networks", In Proceedings of the
International Conference on Compilers, Architecture and Synthesis for Embedded
Systems (CASES), San Francisco, September 2005.
Philo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Martonosi
and Doug Clark, "
Coordinated, Distributed, Formal Energy Management of Chip
Multiprocessors", In Proceedings of the International Symposium on Low
Power Electronics and Systems (ISLPED), San Diego, August 2005.
Hangsheng Wang, Li-Shiuan
Peh and Sharad Malik, “A
Technology-aware and Energy-oriented Topology Exploration for On-chip Networks”,
In Proceedings of the Design Automation and Test in Europe Conference (DATE),
Munich, Germany, March 2005.
Xuning Chen, Li-Shiuan
Peh, Gu-Yeon Wei, Yue-Kai Huang and Paul Prucnal, “Exploring the
Design Space of Power-Aware Opto-Electronic Network
Systems”, In Proceedings of the 11th International Symposium on High-Performance
Computer Architecture (HPCA),
Li Shang, Li-Shiuan Peh, Amit Kumar, and Niraj K. Jha, “Thermal Modeling,
Characterization and Management of On-Chip Networks”, In Proceedings of the
37th International Symposium on Microarchitecture
(MICRO), Portland, Oregon, December 2004.
Yong Wang, Margaret Martonosi and Li-Shiuan Peh, “MARio: Mobility-Adaptive Routing using Route Lifetime
Abstractions in Mobile Ad Hoc Networks”, In ACM
Vassos Soteriou
and Li-Shiuan Peh "Design
Space Exploration of Power-Aware On/Off Interconnection Networks.", In
Proceedings of the 22nd International Conference on Computer Design (ICCD), San
Jose, October 2004 (Best Paper Award).
Noel Eisley and Li-Shiuan Peh "High-Level
Power Analysis of On-Chip Networks.", In Proceedings of the 7th
International Conference on Compilers, Architectures and Synthesis for Embedded
Systems (CASES), Washington D.C., September 2004. [Release Webpage]
Hang-Sheng Wang, Li-Shiuan Peh and Sharad Malik, "Power-Driven
Design of Router Microarchitectures in On-Chip
Networks.", In Proceedings of the 36th International Symposium on Microarchitecture (MICRO), San Diego, November 2003.
Vassos Soteriou
and Li-Shiuan Peh, "
Dynamic Power Management for Power Optimization of Interconnection
Networks Using On/Off Links .", , In Proceedings of the 11th Symposium
on High Performance Interconnects (Hot Interconnects),
Xuning Chen and Li-Shiuan Peh , "Leakage
Power Modeling and Optimization in Interconnection Networks.", , In
Proceedings of the International Symposium on Low Power and Electronics Design
(ISLPED),
Li Shang, Li-Shiuan Peh and Niraj K. Jha, "PowerHerd: Dynamically Satisfying Peak Power Constraints in
Interconnection Networks.", , In Proceedings
of the 17th International Symposium on Supercomputing (ICS),
Hang-Sheng Wang, Li-Shiuan Peh and Sharad Malik, "Power
Model for Routers: Modeling Alpha 21364 and InfiniBand
Routers.", , In IEEE Micro, Vol. 24, No. 1,
January/February 2003 (Best of Hot Interconnects 10).
Li Shang, Li-Shiuan Peh and Niraj K. Jha, "Dynamic
Voltage Scaling with Links for Power Optimization of Interconnection
Networks.", In Proceedings of the 9th International Symposium on
High-Performance Computer Architecture (HPCA), Anaheim, CA, January 2003.
Hang-Sheng Wang, Xinping Zhu, Li-Shiuan Peh and Sharad Malik, "Orion: A
Power-Performance Simulator for Interconnection Networks.", In Proceedings of the 35th International Symposium on Microarchitecture (MICRO),
Phlio Juang,
Hidekazu Oki, Yong Wang, Margaret Martonosi,
Li-Shiuan Peh and Daniel Rubenstein, "Energy-Efficient
Computing for Wildlife Tracking: Design Tradeoffs and Early Experiences with ZebraNet.", In Proceedings of the 10th
International Conference on Architectural Support for Programming Languages and
Operating Systems (ASPLOS), San Jose CA, October 2002, pp. 96-107. [ZebraNet
Project Webpage]
Wei Qin,
Subramanian Rajagopalan, Manish Vaccharajani,
Hangsheng Wang, Xinping
Zhu, David August, Kurt Keutzer, Sharad
Malik and Li-Shiuan Peh, "Design Tools
for Application Specific Embedded Processors.", In Proceedings of the
2nd Workshop on Embedded Systems (EMSOFT), France, October 2002.
Hang-Sheng Wang, Li-Shiuan Peh and Sharad Malik, "A Power
Model for Routers: Modeling Alpha 21364 and InfiniBand
Routers.", In Proceedings of the 10th Symposium on High Performance
Interconnects (Hot Interconnects), Stanford, CA, August 2002, pp. 21-27.
Li Shang, Li-Shiuan Peh and Niraj K. Jha, "Power-Efficient
Interconnection Networks: Dynamic Voltage Scaling with Links.", In Computer Architecture Letters, Volume 1, No. 2, May
2002, pp. 1-4.
Li-Shiuan
Peh and William J. Dally, "A Delay
Model for Router Micro-architectures.", In IEEE Micro, Jan/Feb 2001.
Li-Shiuan Peh and William J. Dally "A Delay
Model and Speculative Architecture for Pipelined Routers.", In Proceedings
of the 7th International Symposium on High-Performance Computer Architecture
(HPCA), January 22-24, 2001, Monterrey, Mexico, pp. 255-266. (Best Student Paper Award)
Li-Shiuan Peh and William J. Dally, "A Delay Model
for Router Micro-Architectures.", In
Proceedings of the 8th Symposium on High-Performance Interconnects (Hot
Interconnects),
Li-Shiuan Peh and William
J. Dally, "Flit-Reservation
Flow Control.", In Proceedings of the 6th
International Symposium on High-Performance Computer Architecture (HPCA),
Students
Niket AgarwalKonstantinos Aisopos
Julia Chen - Graduated August 2005 (Harvard Business School)
Xuning Chen - Graduated May 2008 (Mentor Graphics)
Noel Eisley (Awarded Princeton Wu Prize for Excellence) - Graduated May 2008 (IBM T J Watson Labs)
Natalie Enright-Jerger (Awarded IBM Graduate Fellowship)
Shougata Ghosh - Graduated June 2007.
Tushar Krishna
Kevin Ko
Emmanouil Koukoumidis
Amit Kumar (Awarded the Intel Graduate Fellowship (2006), Intel Labs.
Bin Li
Li Shang - Awarded the Princeton Wallace Memorial Fellowship (2003), Graduated July 2004 (University of Colorado, Boulder)
Vassos Soteriou - Graduated August 2006 (Technical University of Cyprus)
Hang-Sheng Wang - Graduated March 2005 (Freescale Semiconductors)
Yong Wang - Graduated August 2007 (VMWare)