Publications
Journal Papers
Connectivity preserving voxel transformation, Anvesh Komuravelli, Arnab Sinha, Arijit Bishnu, Discrete Applied Mathematics, Special issue for 12th International Workshop on Combinatorial Image Analysis, (in press), 2009.
Design Intent Coverage Revisited, Arnab Sinha, Pallab Dasgupta, Bhaskar Pal, Sayantan Das, Prasenjit Basu, P. P. Chakrabarti, ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol 14, Issue 1 (January 2009) (pdf).
Integrated Verification Approach during ADL-driven Processor Design, Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinreich Meyr, accepted in Microelectronics Journal (invited paper).
Accelerating Assertion Coverage with Adaptive Test-benches, Bhaskar Pal, Ansuman Banerjee, Arnab Sinha, Pallab Dasgupta, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol 27, Issue 5, May 2008 (pdf).
Hardware Accelerated Constrained Random Test Generation, Bhaskar Pal, Arnab Sinha, Pallab Dasgupta, P.P.Chakrabarti, Kaushik De, IET Computers and Digital Techniques, pp-423-433, Vol 1, Issue 4, July 2007 (pdf).
Conference Papers
Connectivity preserving voxel transformation, Anvesh Komuravelli, Arnab Sinha, Arijit Bishnu, International Workshop on Combinatorial Image Analysis, Buffalo, April 7-9, 2008. (pdf)
Integrated verification Approach during ADL-driven Processor Design, Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinreich Meyr, 17th IEEE International Workshop on Rapid System Prototyping (RSP'06), Chania, Greece, 2006 (pdf).
Stensor: A Novel Stochastic Algorithm for Placement of Sensors in a Rectangular Grid, Arnab Sinha, Bhaskar Pal. Presented in paper-presentation competition "Eureka" in Kshitij, IIT Kharagpur, 2007 (Awarded 1st position) (pdf).
Posters
Using Concurrency to Check Concurrency: Checking Serializability in Software Transactional Memory, Arnab Sinha, Sharad Malik, GSRC Annual Symposium 2009, 3, September, 2009, San Jose, CA.
ADL-driven Automatic Test pattern Generation for Functional Verification of Embedded Processors, Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinreich Meyr, 12th IEEE European Test Symposium, Frieburg, 2007 (pdf).