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ErrataHere is a list of known errors in the third edition of Modern VLSI Design. If you find other problems, please contact me. These errors have been fixed in the second printing.p. 46: Linear region drain current hould be k'(W/L)[(Vgs-Vt)Vds - 0.5Vds^2] p. 92: Schematic should show a NAND gate, actually shows a NOR gate. p. 162: Elmore delay should be 0.5 rcn(n-1); bound of sum should be n-i These errors have not yet been fixed.p. 56: Flatband voltage should be phi_gs - q_f/C_{ox} p. 112: The subcaptions in Figure 3-1 are reversed: left network is a'b'c. p. 122: "the minimum voltage produced for a logic 0" -> "the minimum voltage produced for a logic 1" p. 193-194: Pictures should be in order 1-2-3-4, are in order 2-3-4-1. p. 214: "reconvergent feedback" -> "reconvergent fanout" p. 412: should constant vector be B"00000000" ???? p. 504: Fig: 9-19: f should be Greek phi
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