Topics

Table of Contents

Topics

Logic synthesis

Logic synthesis phases

Boolean network

Boolean network example

Terms

Technology-independent logic optimization

Cost in the Boolean network

Simplification

Functions, covers, and cubes

Cover example

Covers and optimizations

Partially-specified functions

Partially-specified function example

Espresso

Expand-irredundant-reduce cycle

Don’t-cares in Boolean networks

Satisfiability don’t-cares

Observability don’t-cares

Partial collapsing

Factorization

Factorization using division

Factorization for delay

Library binding

Technology mapping procedure

Breaking into trees

Technology mapping example

Technology mapping example, cont’d

Technology mapping example, cont’d

Email: wolf@princeton.edu

Home Page: http://www.ee.princeton.edu/~wolf/vlsi-book

Other information:
(c) 2002 Prentice Hall PTR

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