Topics

Table of Contents

Topics

Timing analysis

Signal delay example

Timing analysis procedure

Switch circuit example

Switch circuit example, cont’d

Switch circuit example, cont’d

Timing analysis pessimism

Current/signal flow analysis

False current path example

False current path example, cont’d

Abstract timing model

Transistor sizing

Test generation

PODEM algorithm

Fault propagation example

Fault propagation example, cont’d

Sequential machine optimizations

Coding procedure

Adding code bits

Scheduling and binding

Force-directed scheduling

Scheduling extensions

Binding

Clique partitioning

Clique partitioning example

Hardware/software co-design

Co-synthesis styles

Email: wolf@princeton.edu

Home Page: http://www.ee.princeton.edu/~wolf/vlsi-book

Other information:
(c) 2002 Prentice Hall PTR

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