Topics

Table of Contents

Topics

Logic levels

Logic level matching

Transfer characteristics

Inverter transfer curve

Logic thresholds

Noise margin

Delay

Delay assumptions

Current through transistor

Resistive model for transistor

Resistive approximation

Ways of measuring gate delay

Inverter delay circuit

Inverter delay with t model

t model inverter delay

Quality of RC approximation

Quality of step input approximation

Results of using small pullup

Power consumption analysis

Other models

Body effect and gates

Body effect and gate input ordering

Power consumption circuit

Power consumption

Observations on power consumption

Speed-power product

Parasitics and performance

Effect of parasitics

Effects of parasitics, cont’d

Driving large loads

Cascaded driver circuit

Optimal sizing

Email: wolf@princeton.edu

Home Page: http://www.ee.princeton.edu/~wolf/vlsi-book

Other information:
(c) 2002 Prentice Hall PTR

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