Topics
Sources of delay
Fanout
Ways to drive large fanout
Buffers
Wire capacitance
Placement and wire capacitance
Path delay
Path delay example
Critical path
Delay model
Critical path through delay graph
Reducing critical path length
False paths
Logic rewrites
Logic transformations
False path example
Logic optimization
Technology-independent optimizations
Technology-dependent optimizations
Email: wolf@princeton.edu
Home Page: http://www.ee.princeton.edu/~wolf/vlsi-book
Other information: (c) 2002 Prentice Hall PTR
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