Topics
Clock period
Unbalanced delays
Retiming
Retiming properties
Advanced performance analysis
Example with unbalanced phases
Spreading out a phase
Spreading out a phase, cont’d.
Problems
Sequential machine design
Counter
One-bit counter
One-bit counter implementation
One-bit counter operation
One-bit counter sticks
n-bit counter structure
State transition graphs/tables
01 string recognizer
01 recognizer operation
State transition table
State transition graph
State assignment
01 recognizer encoding
Logic implementation
Traffic light controller
Traffic light system
System operation
Traffic light machine
Sequencer state transition graph
Email: wolf@princeton.edu
Home Page: http://www.ee.princeton.edu/~wolf/vlsi-book
Other information: (c) 2002 Prentice Hall PTR
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