"Hardware and Software Cache Pre-fetching Techniques for MPEG Benchmarks", Daniel F. Zucker, Ruby B. lee, and Michael J. Flynn, IEEE Transactions on Circuits and Systems for Video Technology. Vol. 10 No. 5, pp. 782-796. August 2000.

“Challenges to Combining General-Purpose and Multimedia Processors”, T. Conte, P. Dubey, M. Jennings, R. Lee, A. Peleg, S. Rathnam, M. Schlansker, P. Song, and A. Wolfe, IEEE Computer,  Volume 30 Number 12, December 1997, pp. 33-37.

“Media Processing: A New Design Target”,  R. Lee, M. Smith,  IEEE Micro, Volume 16 Number 4, August 1996, pp. 6-9.

“Subword Parallelism with MAX-2”,  R. Lee, IEEE Micro, Volume 16 Number 4,  August 1996, pp. 51-59.

"Algorithmic and Architectural Enhancements for Real Time MPEG-1 Decoding on a General Purpose RISC Workstation", V. Bhaskaran, K. Konstantinides, R. Lee, J. Beck,  IEEE Transactions on Circuits and Systems for Video Technology,  Volume 5 Number 5, October 1995, pp. 380-386.

"Accelerating Multimedia with Enhanced Microprocessors", R. Lee, IEEE Micro, Volume 15 Number 2, April 1995, pp. 22-32.

"Real-Time Software MPEG Video Decoder on Multimedia-Enhanced PA-7100LC Processors", R. Lee, J. Beck, J. Lamb, K. Severson, Hewlett-Packard Journal, Volume 46 Number 2, April 1995, pp. 60-68.

"HP's New Technology Enables Low-End Workstation to Play MPEG Video Streams at 30 Frames per Second", (invited paper, translated into Japanese), R. Lee, Nikkei Electronics 1995.1.2 (no. 625), Jan 2 1995, pp. 81-90.

"Precision Architecture", R. Lee,  IEEE Computer, Volume 22 Number 1, January 1989, pp. 78-91.

"Hewlett-Packard Precision Architecture: The Processor", M. Mahon, R. Lee, T. Miller, J. Huck, and W. Bryg, Hewlett-Packard Journal, Vol. 37 No. 8, August 1986, pp. 4-21.

"Performance Impact of Data Compression on Virtual Private Network Transactions", John P. McGregor and Ruby B. Lee, Proceedings of the 25th IEEE Conference on Local Computer Networks, November 2000. (.postscript)

"Fast Subword Permutation Instructions Using Omega and Flip Network Stages", Xiao Yang and Ruby B. Lee,  Proceedings of International Conference on Computer Design, ICCD 2000, September 17-20, 2000, Austin, Texas, pp. 15-22. (.postscript)

"Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures", Ruby B. Lee,    Proceedings of IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2000, Boston, Massachusetts,  July 10-12, 2000.  (.postscript)

"Bit Permutation Instructions for Accelerating Software Cryptography", Zhijie Shi and Ruby B. Lee, Proceedings of IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2000, Boston, Massachusetts,  July 10-12, 2000.  (.postscript)

"Cost-Effective Multiplication with Enhanced Adders for Multimedia Applications", Zhen Luo and Ruby B. Lee, Proceedings IEEE International Symposium on Circuits and Systems, ISCAS 2000, May 28-31, 2000, Geneva, Switzerland pp. I-651 - I-654.  (.postscript)

"Fast Subword Permutation Instructions based on Butterfly Network", Xiao Yang, Manish Vachharajani, Ruby B. Lee, Proceedings of Media Processors 2000, January 27-28, 2000, San Jose, California, pp. 80-86.  (.postscript)

“Efficiency of microSIMD architectures and index-mapped data for media processors”, invited paper, Ruby  Lee, Media Processors 1999, IS&T/SPIE Symposium on Electric Imaging: Science and Technology, January 25-29, 1999, San Jose, California, pp. 34-46. (.postscript)

“Fundamental Subword Permutation Primitives for Two-Dimensional Media Processing with MicroSIMD architectures”, Princeton University Electrical Engineering department Technical Report, 10/25/1998.

“An Automated Method for Software Controlled Cache Prefetching”, D. Zucker, R. Lee, M. Flynn, Proceedings of the 31st. Hawaii International Conference on System Sciences,  January 1998, Kona, Hawaii. (.postscript)

“Performance Enhancement of H.263 Encoder Based on Zero Coefficient Prediction”, A. Yu, R. Lee, M. Flynn, Proceedings of the Fifth ACM International Multimedia Conference, November 9-13, 1997, Seattle, Washington, pp. 21-29.

“Multimedia Extensions for General-Purpose Processors”, (invited paper), R. Lee, IEEE Workshop on Signal Processing Systems SiPS97 Design and Implementation (formerly VLSI Signal Processing), November 3-5, 1997, Leicester, United Kingdom, pp. 9-23. (.postscript)

“Early Detection of All-Zero Coefficients in H.263”, A. Yu, R. Lee, and M. Flynn, Proceedings of the Picture Coding Symposium, September 10-12, 1997, Berlin, Germany, pp. 159-164.

“Imaging Processing Considerations for Digital Photography”, P. Wong, D. Tretter, C.  Herley,  N. Moayeri, R. Lee, Proceedings of IEEE Compcon, February 23-26, 1997,  San Jose, California, pp. 280-285.  (.postscript)

“An Evaluation of Video Fidelity Metrics”, A. Yu, R. Lee, M. Flynn, Proceedings of IEEE Compcon, February 23-26, 1997,  San Jose, California, pp. 49-55.   (.postscript)

“Mapping of Application Software to the Multimedia Instructions of General-Purpose Microprocessors”,  R. Lee, L. McMahan, Multimedia Hardware Architectures 1997, IS&T/SPIE Symposium on Electric Imaging: Science and Technology, Feb 10-14, 1997, San Jose, California.  (.postscript)

“Achieving Subword Parallelism by Software Reuse of the Floating-Point Data Path”, Multimedia Hardware Architectures 1997,  D. Zucker, R. Lee, M. Flynn,  IS&T/SPIE Symposium on Electric Imaging: Science and Technology, Feb 10-14, 1997, San Jose, California.  (.postscript)

“A Comparison of Hardware Prefetching Techniques for Multimedia Benchmarks”, D. Zucker, M. Flynn, R. Lee,  3rd. IEEE International Conference on Multimedia Computing and Systems, Hiroshima, Japan, June 17-23, 1996.  (.postscript)

“HP’s  Multimedia instructions Speed Video”, R. Lee (invited), in Bernard Cole’s feature section on Multimedia Computing, E.E. Times, April 17, 1996.

“64-bit and Multimedia Extensions in the PA-RISC 2.0 Architecture”,  R. Lee, J. Huck, Proceedings of IEEE Compcon, Feb 25-28, 1996, Santa Clara, California, pp. 152-160.   (.postscript)

“Improving Performance for Software MPEG Players”, D. Zucker, M. Flynn, R. Lee,   Proceedings of IEEE Compcon, Feb 25-28, 1996, Santa Clara, California, pp. 327-332.

“A Comparison of Hardware Prefetching Techniques for Multimedia Benchmarks”, D. Zucker, M. Flynn, R. Lee, Technical Report No. CSL-TR-95-683, Computer Systems Laboratory, Stanford University, December 1995.

"Realtime MPEG Video via Software Decompression on a PA-RISC Processor", R. Lee, Proceedings of IEEE Compcon, March 5-9, 1995, San Francisco, California, pp. 186-192.  (.postecript)

"Realtime MPEG-1 Software Decoding on HP Workstations", V. Bhaskaran, K. Konstantinides, R. Lee, Digital Video Compression: Algorithms and Technologies 1995, IS&T/SPIE Symposium on Electric Imaging: Science and Technology, Feb 5-10, 1995, San Jose, California.

"Digital Video Decompression on a RISC Video Conferencing Desktop", J. Beck, R. Lee, K. Severson, Proceedings of Desktop Video Conferencing Technical Seminar, August 24-26, 1994, Framingham, Massachusetts.

“Multimedia Enhancements for PA-RISC Processors”, R. Lee, Hot Chips VI,  Stanford, California, August 1994, pp. 183-192.

“Reuse of High Precision Arithmetic Hardware to Perform Multiple Concurrent Low Precision Calculations”, D. Zucker, R. Lee, Technical Report No. CSL-TR-94-616, Computer Systems Laboratory, Stanford University, April 1994. (.postscript)

"Achieving Realtime Software MPEG Decompression on a Multimedia-Enhanced PA-RISC Processor", R. Lee, Proceedings of the Hewlett-Packard Image and Data Compression Conference, May 10 1994, Palo Alto, California.

"HP's PA7100LC:  A Low-Cost Superscalar PA-RISC Processor", P. Knebel, B. Arnold, M. Bass, W. Kever, J. Lamb, R. Lee, P. Perez, S. Undy and W. Walker, Proceedings of IEEE Compcon, February 22-26, 1993, San Francisco, California, pp. 441-447.

"Pathlengths of SPEC Benchmarks for PA-RISC, MIPS and SPARC", L. McMahan and R. Lee, Proceedings of IEEE Compcon, February 22-26, 1993, San Francisco, California, pp. 481-490. (.postscript)

“Enhancing Multimedia Support through Subword Parallelism: More Halfword Parallel Instructions for PA2”, R. Lee, Hewlett Packard paper, July 1, 1992, revised Aug 31, 1993.

“Enhancing Multimedia Support through Subword Permutation”, R. Lee, Hewlett Packard paper, July 1 1992, revised August 31, 1993.

“Enhancing Multimedia Support through Subword Parallelism: Parallel Halfword Arithmetic in PA1 and PA2”, R. Lee, Hewlett Parckard paper, June 24, 1992, revised Aug 31, 1993.

“New Subword-Twiddling Instructions”, R. Lee, Hewlett Packard paper, May 6, 1992.

"Pathlength Reduction Features in the PA-RISC Architecture", R. Lee, M. Mahon and D. Morris, Proceedings of IEEE Compcon, February 24-28,1992, San Francisco, California, pp. 129-135.

"HP Precision: A SPECTRUM Architecture",  R. Lee,  Proceedings of the 22nd. Hawaii International Conference on System Sciences,  Vol. 1 Architecture Track, January  3-6, 1989, Kailua-Kona, Hawaii, pp. 242-.

"HP Precision Architecture", R. Lee, Technical Women's Conference, Palo Alto, California, August 1988.

"A 32b CMOS Single-Chip RISC Type Processor", A. Marston, G. Burroughs, K. Chen, A. Desroches, G. Emerson, J. Hsu, R. Lee, F. Najmi, A. Peebles, K. Peterson, B. Saperstein, J. Wangunhardjo, A. Wiemann, and R. Wu, Proceedings of IEEE International Solid State Circuits Conference, February 1987, pp. 28-29.

"Efficient Testing of RISC Microprocessors", R. Lee, J. Hsu and G. Burroughs, IEEE International Conference on Computer-Aided Design, Santa Clara, California, November 1986.

"Testability Design for the Single Chip CMOS SPECTRUM Processor", R. Lee, R. Wu and K.C. Chen, Design Technology Conference, Berkeley, California, May 1986. Best Paper Award.

"STERLING MOS Single Chip SPECTRUM Processor", R. Lee and G. Emerson, Design Technology Conference, Berkeley, California, May 1986.

"New Design Methodologies and Circuits Needed for Parallel VLSI Supercomputers", R. Lee and A. Wiemann, Proceedings of the International Conference on Circuits and Computers, New York, New York, September 1982.

"Empirical Results on the Speed, Efficiency, Redundancy and Quality of Parallel Computations", R. Lee, Proceedings of the 1980 International Conference on Parallel Processing, IEEE Computer Society, Washington, D.C.,  August 1980.

"Performance Characterization of Parallel Processor Organizations", R. Lee, Ph. D. thesis, Stanford University, Stanford, California, May 1980.

"Performance Characterization of Parallel Computations", R. Lee, Computer Systems Laboratory Technical Report 158, Stanford University, California, September 1978.

"Optimal Program Control Structures Based on the Concept of Decision Entropy", Computer Systems Laboratory Technical Report 156, Stanford University, California, July 1978.

"Performance Bounds in Parallel Processor Organizations", R. Lee, Proceedings of the Symposium on High Speed Computer and Algorithm Organization, Champaign, Illinois, April 1977.

"Performance Bounds for Parallel Processors", Computer Systems Laboratory Technical Report 125, Stanford University, California, November 1976.

“Precision Architecture”, (invited) R. Lee,  in “Reduced Instruction Set Computers”, Second Edition, by William Stallings,  IEEE Computer Society Press,  1990, pp. 216-230.

"New Design Methodologies and Circuits Needed for Parallel VLSI Supercomputers", (invited)  R. Lee and A. Wiemann, in “Advanced Computer Architecture Tutorial”, edited by Dharma Agrawal, IEEE Computer Society Press, Order Number 667, 1986.

"Performance Bounds in Parallel Processor Organizations", R. Lee, in “High Speed Computers and Algorithm Organization”, edited by David Kuck et al, Academic Press, 1977.

“Multimedia Extensions for General-Purpose Processors, including (codename)”, R. Lee, HP broadcast seminar, December 11, 1997, Cupertino, California.

“Multimedia Extensions for General-Purpose Processors”, invited keynote speech, IEEE Signal Processing Systems: Design and Implementation,  November 3-5, 1997, Leicester, United Kingdom.

“Exploiting Parallelism in Media Processing”, invited keynote speech, High Performance Computer Architecture conference, Feb 2-5, 1997, San Antonio, Texas.

“Multimedia Extensions for General-Purpose Microprocessors”, (invited), Microprocessor Forum, October 1996, San Jose, California.

"Accelerating Multimedia with Subword Parallelism in Microprocessors",  The Distinguished Lecture Series X, (invited) videolecture recorded March 24, 1995, released July 1995, University Video Communications, California, http://www.uvc.com/.

“Multimedia Workstations and Systems”, (invited), Frost and Sullivan Strategic Multimedia Conference, Oct 3-4, 1994, New York.

Last update: 9/29/2000(partial), RL.